Mojo FPGA ishlab chiqish kengashi qalqoni: 3 qadam

2024 Muallif: John Day | [email protected]. Oxirgi o'zgartirilgan: 2024-01-30 13:24

Ushbu qalqon yordamida Mojo ishlab chiqish kartasini tashqi kirishga ulang.

Mojo rivojlantirish kengashi nima?

Mojo ishlab chiqish kengashi - bu Xilinx spartan 3 FPGA atrofida ishlab chiqilgan kengash. Kengash Alchitry tomonidan ishlab chiqarilgan. FPGA -lar juda foydali, bu erda bir vaqtning o'zida bir nechta jarayonlarni bajarish kerak.

Sizga nima kerak?

Ta'minotlar

Mojo rivojlantirish kengashi

Gerber fayli

8 x 15k ohmli rezistorlar (ixtiyoriy*)

4 x 470 ohmli rezistorlar

4 x 560 ohmli rezistorlar

4 x CC etti segmentli displey

4 x 3 mm LED

4 x SPDT sensorli kalitlari

1 x 4 pozitsiyali sirtga o'rnatiladigan DIP kaliti

2 x 25 dan 2 gacha yoki 4 x 25 sarlavhalar

1x 2 dan 5 pinli qutining boshi

Lehimlash temir

Lehim

Oqim

*(agar bu rezistorlar o'tkazib yuborilgan bo'lsa, tegishli pinlar uchun ichki tortish/tushirish yoqilishi kerak)

1 -qadam: Gerberni siz tanlagan kompyuter ishlab chiqaruvchisiga yuklang

Mening taxtalarim uchun men JLC PCB -dan buyurtma berdim.

Men qilgan yagona o'zgarish Mojoning qora rangiga mos keladigan rang edi.

2 -qadam: Kengash yig'ilishi

Lehimlashda men har doim eng past qismlarni lehimlashni foydali deb bilaman, shuning uchun rezistorlardan boshlash yaxshidir.

R5, R6, R7, R8, R9, R10, R11 va R12 - kalitlarni tushirish uchun ishlatiladigan 15k ohmli rezistorlar (agar siz ichki tortish/ochish tizimidan foydalanayotgan bo'lsangiz, bunga e'tibor bermang).

R1, R2, R3, R4 - 560 ohmli rezistorlar, ular 7 segmentli displey orqali tokni cheklash uchun javobgardir.

R13, R14, R15, R16 - 470 ohmli rezistorlar, ular tokni 4 ta LED orqali cheklash uchun javobgardir.

Keyingi payvandlash tugmasi, sensorli kalitlar, svetodiodlar, etti segmentli displey va quti sarlavhasi ulagichi.

Pimlarni tekislash uchun 25 -ni 2 -ga (yoki 2 -ga 25 -ga 1 -ga) qo'ying. Qalqonni pim bilan tekislang va uni joyiga lehimlang.

3 -qadam: dasturiy ta'minotni sozlash

Alchitry veb -saytiga havola qilinadigan dasturiy ta'minot uchun Xilinx ISE -ni ishga tushirish va o'rnatish uchun sizga nima kerakligini aytib beradi. Biroq,.ucf faylini o'zgartirish, bu sizning dasturingizni ishga tushirish uchun nima muhimligini biladi.

Mana, qalqon bilan ishlatadigan.ucf fayli:

VCCAUX konfiguratsiyasi = 3.3;

NET "clk" TNM_NET = clk; TIMESPEC TS_clk = PERIOD "clk" 50 MGts YUQORI 50%; NET "clk" LOC = P56 | IOSTANDARD = LVTTL; NET "rst_n" LOC = P38 | IOSTANDARD = LVTTL; NET "cclk" LOC = P70 | IOSTANDARD = LVTTL; NET "spi_mosi" LOC = P44 | IOSTANDARD = LVTTL; NET "spi_miso" LOC = P45 | IOSTANDARD = LVTTL; NET "spi_ss" LOC = P48 | IOSTANDARD = LVTTL; NET "spi_sck" LOC = P43 | IOSTANDARD = LVTTL; NET "spi_channel" LOC = P46 | IOSTANDARD = LVTTL; NET "spi_channel" LOC = P61 | IOSTANDARD = LVTTL; NET "spi_channel" LOC = P62 | IOSTANDARD = LVTTL; NET "spi_channel" LOC = P65 | IOSTANDARD = LVTTL; NET "avr_tx" LOC = P55 | IOSTANDARD = LVTTL; NET "avr_rx" LOC = P59 | IOSTANDARD = LVTTL; NET "avr_rx_busy" LOC = P39 | IOSTANDARD = LVTTL; NET "Q [0]" LOC = P26 | IOSTANDARD = LVTTL; NET "Q [1]" LOC = P23 | IOSTANDARD = LVTTL; NET "Q [2]" LOC = P21 | IOSTANDARD = LVTTL; NET "Q [3]" LOC = P16 | IOSTANDARD = LVTTL; NET "S [0]" LOC = P7 | IOSTANDARD = LVTTL; NET "S [1]" LOC = P9 | IOSTANDARD = LVTTL; NET "S [2]" LOC = P11 | IOSTANDARD = LVTTL; NET "S [3]" LOC = P14 | IOSTANDARD = LVTTL; NET "pb [1]" LOC = P30 | IOSTANDARD = LVTTL; NET "pb [2]" LOC = P27 | IOSTANDARD = LVTTL; NET "pb [3]" LOC = P24 | IOSTANDARD = LVTTL; NET "pb [4]" LOC = P22 | IOSTANDARD = LVTTL; NET "sevsega [0]" LOC = P57 | IOSTANDARD = LVTTL; NET "sevsegb [0]" LOC = P58 | IOSTANDARD = LVTTL; NET "sevsegc [0]" LOC = P66 | IOSTANDARD = LVTTL; NET "sevsegd [0]" LOC = P67 | IOSTANDARD = LVTTL; NET "sevsege [0]" LOC = P74 | IOSTANDARD = LVTTL; NET "sevsegf [0]" LOC = P75 | IOSTANDARD = LVTTL; NET "sevsegg [0]" LOC = P78 | IOSTANDARD = LVTTL; NET "sevsegdp [0]" LOC = P80 | IOSTANDARD = LVTTL; NET "sevsega [1]" LOC = P82 | IOSTANDARD = LVTTL; NET "sevsegb [1]" LOC = P83 | IOSTANDARD = LVTTL; NET "sevsegc [1]" LOC = P84 | IOSTANDARD = LVTTL; NET "sevsegd [1]" LOC = P85 | IOSTANDARD = LVTTL; NET "sevsege [1]" LOC = P87 | IOSTANDARD = LVTTL; NET "sevsegf [1]" LOC = P88 | IOSTANDARD = LVTTL; NET "sevsegg [1]" LOC = P92 | IOSTANDARD = LVTTL; NET "sevsegdp [1]" LOC = P94 | IOSTANDARD = LVTTL; NET "sevsega [2]" LOC = P97 | IOSTANDARD = LVTTL; NET "sevsegb [2]" LOC = P98 | IOSTANDARD = LVTTL; NET "sevsegc [2]" LOC = P99 | IOSTANDARD = LVTTL; NET "sevsegd [2]" LOC = P100 | IOSTANDARD = LVTTL; NET "sevsege [2]" LOC = P101 | IOSTANDARD = LVTTL; NET "sevsegf [2]" LOC = P102 | IOSTANDARD = LVTTL; NET "sevsegg [2]" LOC = P104 | IOSTANDARD = LVTTL; NET "sevsegdp [2]" LOC = P111 | IOSTANDARD = LVTTL; NET "sevsega [3]" LOC = P114 | IOSTANDARD = LVTTL; NET "sevsegb [3]" LOC = P115 | IOSTANDARD = LVTTL; NET "sevsegc [3]" LOC = P116 | IOSTANDARD = LVTTL; NET "sevsegd [3]" LOC = P117 | IOSTANDARD = LVTTL; NET "sevsege [3]" LOC = P118 | IOSTANDARD = LVTTL; NET "sevsegf [3]" LOC = P119 | IOSTANDARD = LVTTL; NET "sevsegg [3]" LOC = P1120 | IOSTANDARD = LVTTL; NET "sevsegdp [3]" LOC = P121 | IOSTANDARD = LVTTL;

Esda tutingki, agar siz.ucf -dagi pinlarni tahrirlash uchun ochiladigan rezistorlarni o'rnatmagan bo'lsangiz

| PASTGA TORTMOQ; o

| PULLUP;

Agar siz blokdan biror narsa uchun foydalanmoqchi bo'lsangiz, ulanishlar quyidagicha. Chapda pin kodi va o'ngda.ucf -da belgilashingiz kerak bo'lgan mojo pin raqami:

pin 1 = 29

pin 2 = 51

pin 3 = 32

pin 4 = 41

pin 5 = 34

pin 6 = 35

pin 7 = 40

pin 8 = 33

pin 9 = GND

pin 10 = +V